Technical Conference: 15 - 19 March 2026
Exhibition: 17 - 19 March 2026
Los Angeles Convention Center | Los Angeles, California, United States

Technical Conference: 15 - 19 March 2026
Exhibition: 17 - 19 March 2026
Los Angeles Convention Center | Los Angeles, California, United States

Is CPO Integration Ready for AI Pipelines?

15 Mar 2026
16:00 - 18:30
Room 515B

CPO has been an exotic communication paradigm for over a decade now, and now appears to be in the early stages of deployment by a few large companies and a few start-ups. The integration of CPO with ASICs offers a direct way for digital data to access the fiber without going through power-hungry and expensive electronic-to-optical conversion modules (i.e. pluggable optics). For AI, GPUs need to be connected together within a pod to create a large high bandwidth memory (HBM)-centric paradigm and to facilitate an efficient attention-centric execution of large parameter count models. As large language models (LLMs) grow in parameter count, the number of GPUs in a pod needs to increase in the scale up domain as increasing HBM is bounded by package size. To interconnect GPUs in the scale up (intra-pod) or scale out (for horizontal scalability) domain, there is a need for a high-bandwidth solution which would consume low power, integrate well with the ASIC/interposer, and support a plethora of network protocols while being low cost and reliable at the same time. In this quest, CPO turns out to be an apt solution for integration with both GPUs, CPUs, and switch ASICs in facilitating AI pipelines however there are many implementation issues that still need to be addressed.

The key questions to address in this workshop are:

Mass Adoption:

  • Which is more important: power consumption or cost?
  • What kind of beachfront densities are needed to support CPO for AI?
  • Is CPO reliability within the bounds of AI infrastructure? (blast radius, impact of ELSFP, fiber shuffle, wavelength sparing, fiber attach)

Packaging:
  • What CPO packaging technologies are most compatible with GPUs and switches?
    • I.e. Soldered vs socketed and pigtailed vs detachable?
  • What are ways to solve system-wide challenges (i.e. fiber cabling, link flapping, serviceability) while integrating CPO? At the pod, rack, data-center level?

Underlying Technology:
  • From a SerDes perspective, what is a good client SerDes intercept – 224G or 448G?
  • Does WDM make sense for CPO if it impacts the radix?
  • Is there a benefit to using CPO with comb lasers (>16 λs)?
  • For the optical modulator, which of the MZI and MRM technologies would be more efficient, cheaper and easier to implement?


 

Organizers

  • Ashwin Gumaste

    NVIDIA, United States

  • Takako Hirokawa

    GlobalFoundries, United States

  • Daniel Kuchta

    NVIDIA, United States

  • Hari Potluri

    Broadcom, United States

Speakers

  • Ankur Aggarwal

    Celestial AI, United States

    About the Speaker

    Dr. Ankur Aggarwal
    Vice President of Advanced Packaging & Supply Chain
    Marvell Technology


    Dr. Ankur Aggarwal is Vice President of Advanced Packaging & Supply Chain at Marvell Technology. Prior to Marvell, he served as Vice President of Advanced Packaging & Supply Chain at Celestial AI, creator of the Photonic Fabric™ optical scale-up network for accelerated computing, which was acquired by Marvell in February 2026.
    Dr. Aggarwal joined Celestial AI in 2022 during its early stages and was instrumental in pioneering the company’s breakthrough Photonic Fabric architecture. He drove innovations including optically accessible 2.5D and 3D packaging and photonically bridged architectures that are redefining the limits of compute scaling, performance, bandwidth, and power efficiency in AI systems.
    Throughout his career, Dr. Aggarwal has held senior engineering and strategic leadership roles at Intel, Finisar, and II-VI Incorporated, where he shaped the development and scaling of advanced semiconductor and photonics platforms. At II-VI, he led global procurement initiatives, architecting one of the industry’s most sophisticated and far-reaching photonics supply chains, aligning operational execution with long-term strategic objectives across diverse technology ecosystems.
    Dr. Aggarwal holds a Ph.D. in Materials Science and Engineering from the Georgia Institute of Technology and a Bachelor of Engineering degree from IIT Varanasi.

  • Anthony Torza

    Cisco, United States

    About the Speaker

    Anthony Torza is a hardware architect for Cisco’s Cisco8000 and Nexus datacenter switches based on Cisco Silicon One ASIC technology.
    He enjoys working with experts across disciplines to solve particularly challenging problems. 
    CPO is certainly one of the most vexing - a delicate balance of optical, electrical, mechanical and thermal engineering.
    Anthony has a Masters in Electrical Engineering from Stanford (and his immigrant parents only recently stopped asking when he would go back to finish his PhD)

  • Barak Freedman

    NVIDIA, United States

    About the Speaker

    Dr. Barak Freedman, Sr. Director at NVIDIA, is leading the company’s CPO (Co-Packaged-Optics) engineering activities for the past five+ years. 
    Prior to joining NVIDIA, Barak held technical management positions at Magic Leap, Intel and PrimeSense (now Apple), leading development of 3D imaging devices, advanced sensors and Near-Eye display technologies.
    Barak holds a PhD in Physics from the Technion, Israel.
     

  • Drew Alduino

    Meta, United States

  • Harsha Bojja

    Google TPU, United States

    About the Speaker

    Harsha Bojja serves as a Platform Architect at Google, where he spearheads the design and development of cutting-edge AI/ML systems and platforms. His expertise lies in optimizing system performance, AI compute platforms for data center design and operational excellence, thermal and power management, enabling the creation of robust, large-scale training and inference clusters. Harsha has held key roles at industry leaders such as Meta Platforms,  Microsoft, Nokia Bell Labs, and several innovative cloud infrastructure startups.  As a key member of the OCP Steering Committee and various university Industry Advisory Boards, Harsha plays a pivotal role in shaping the future of AI infrastructure.

  • Juthika Basak

    AMD, United States

  • Mark Filer

    Oracle, United States

    About the Speaker

    Mark M. Filer works at Oracle as architect and area tech lead in optics and photonic interconnect for AI and public cloud systems. Immediately prior, Mark was at a stealth startup where he served as area tech lead in photonic architectures for GW-scale AI systems, focusing on driving innovations and ecosystems to support power-/cost-optimized and operationally resilient AI networks. He has spent much of his career at hyperscalers (Google, Microsoft and AWS) where he worked across diverse areas of optical networking including DC-fabric and AI backend systems, metro/DCI, long-haul and subsea. Mark has consistently participated in industry standard and consortia organizations to specify and deliver open platforms (such as 400ZR), and he had the honor of serving on the OIF Board of Directors as Vice President. He has served on OFC technical committees, Optica Executive Forum committee, and as a reviewer for IEEE and Optica journal publications. Mark has authored several publications and patents in the areas of photonic integration, cloud-scale network architectures, open line systems, long-haul transmission, and DWDM system impairments. He holds B.Sc. and M.Sc. degrees in electrical engineering from the Georgia Institute of Technology in Atlanta, GA.

  • Matt Traverso

    Broadcom, United States

    About the Speaker

    Matt Traverso is a Distinguished Engineer for the Broadcom Optical Systems Division (OSD) with a focus on next generation optical interconnect solutions including co-packaged optics. He has led the development of multiple high volume optical module products at 100 Gbps and beyond. Matt has been active in the development and definition of optical communications standards and optical form factors since 2000 including as the original editor of the CFP MSA (Multi-Source Agreement). He has dozens of journal publications and has over 30 patents awarded and pending. He graduated from Stanford University in Materials Science & Engineering.
     

  • Vijay Vusirikala

    Arista, United States

    About the Speaker

    Vijay Vusirikala is a Distinguished Lead at Arista, which is a real title that he did not make up. He got there by spending 14+ years at Google building global backbone infrastructure, then leading network engineering at an AI startup, accumulating 17+ patents along the way, and a PhD from UMD that he uses mostly as a conversation ender. His work sits at the foundation of hypescaler technical infrastructure - essential, largely invisible, and surprisingly hard to make sound exciting at a cocktail party. He's fine with that.