09 Mar 2027
14:45 - 15:45
Expo Theater III
Power-efficient, low-latency, optical interconnects are critical to enabling next-generation High-Performance Computing hardware supporting AI training and inference. Our panel of experts will examine the requirements and standards needed to deliver dense, reliable, and energy-efficient interconnects for largescale AI compute. The discussion will include the evolving system needs across scale-up and scale-out architectures and the technical tradeoffs that drive design choices—ASIC escape density, reliability and cost sensitivity, power efficiency, and emerging technologies such as bidirectional optics.
Panelists will discuss OIF current standardization activities and its role in cultivating interoperable ecosystems and predictable supply chains for AI interconnects as well as proposing criteria for compelling, standards-based AI scale-up solutions that meet application timelines and market realities.
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