In most silicon photonics applications, static or low-speed phase shifters are a critically needed component of the on-chip device portfolio. They are needed to compensate fabrication errors and phase drift in interferometric or resonant photonic circuits; to set bias points for interferometers, modulators or switches; to wavelength tune and/or lock wavelength-selective circuits like filters; as well as to actuate low-speed switches. These applications include digital (e.g. telecom, datacom) communication, analog (e.g. microwave photonic) communication and filtering, LIDAR like beamforming/steering optical phased arrays, optical switching, photonic quantum information processing, programmable photonic circuits, computation in the optical domain, etc.
Due to silicon’s large thermo-optic coefficient and ease of implementation in industrial silicon photonics foundries, direct Joule heating of silicon or metal resistive heaters are the go-to methods for phase tuning. As device size shrinks and the number of monolithically integrated devices increases, thermal tuning becomes less attractive due to thermal crosstalk between nearest neighbors and aggregate power consumption. Additionally, thermal phase tuning may not be the best option for applications that must operate at low temperature (e.g. some quantum chips), high temperatures (e.g. LIDAR), or over a wide temperature range (e.g. CPO chiplets).
A wide variety of alternate phase tuning approaches have been proposed, such as electro-optic (LiNbO3, BaTiO3, EO-polymer, etc), phase change (GST, GSST, Sb2Se3, etc), strain, MEMS, MOSCAP structures, conductive oxides, liquid crystal, etc. Many have been demonstrated in research university cleanrooms, and some of these technologies are available at specialized foundries, but they are not standard offerings in silicon photonics foundry platforms.
This panel will explore some of these technologies, their pros, cons, application space, potential for silicon photonics foundry adoption, and ability to advance silicon photonic products beyond the limits imposed by thermal tuning.
Some of the key questions that will be addressed:
- What are the performance metrics required for static or low speed phase tuning devices? What additional requirements need to be considered from packaging and application points of view?
- What are the limitations of current state of the art thermal tuning? Which technologies have the potential to break through these limits?
- Which technologies can scale in density without sacrificing performance and reliability? What are the challenges for their adoption in silicon photonics foundries?
- Is there an ideal universal phase tuning technology, or is there a need to tailor the tuning technology to each application?
Organizers
- Sagi Mathai (Lead), Hewlett Packard Labs, USA
- Matteo Cherchi, Xanadu Quantum Computing, Canada
- Shai Cohen, NVIDIA Corp., Israel
- Mario Dagenais, University of Maryland at College Park, USA, USA
- Milos Popovic, Boston Univ., USA
- Sudip Shekhar, Univ. of British Columbia, Canada
Speakers
- Wim Bogaerts, Ghent Univesity/IMEC, Belgium
- Eric Dudley, PsiQuantum, USA
- Matt Eichenfield, Univ. of Arizona, USA
- Ted Letavic, Global Foundries, USA
- Arka Majumdar, University of Washington, USA
- Nandish Mehta, NVIDIA, USA