Electrical Data Rates Keep Pushing Forward; An OIF Update

Tuesday, 08 June 11:00 – 12:00

Session organized by Optical Internetworking Forum (OIF)
 

Session Description:

A panel of industry experts and OIF members will provide an update on OIF’s CEI-112G and CEI-224G development work including discussion and debate of 224G modulations.

Moderator:

Nathan Tracy, TE Connectivity/OIF, USA

Nathan Tracy currently serves as OIF’s VP of Marketing and member of the board of directors. During the past ten years he has also served OIF as president, technical committee chair and technical committee vice chair. As a technologist on the system architecture team and manager of industry standards for the Data and Devices business unit at TE Connectivity (TE), Nathan is responsible for driving standards activities and working with key customers to enable new system architectures. Nathan has more than 30 years of experience in technology development, marketing and business development for TE in areas including RF/microwave, and high-speed signaling technology for the networking, telecom, wireless, automotive and defense markets. Nathan is also an active member of other industry standards and associations. Currently he serves the Ethernet Alliance as a member of the board, and he is a regular attendee and contributor to IEEE 802.3 and COBO. Additionally, he is active in a number of industry MSAs and forums where he has held leadership roles. Nathan earned his Bachelor of Science Electrical Engineering Technology degree from the University of Massachusetts, Dartmouth.

Presenters:

Dave Stauffer, Kandou Bus/OIF, Switzerland
Presentation Title: OIF Common Electrical I/O – History and Future

Gary Nichol, Cisco Systems/OIF, USA
Presentation Title: Considerations for 112 Gbps and 224 Gbps Applications - A System Vendor Perspective

Nathan Tracy, TE Connectivity/OIF, USA
Presentation Title: Channel Considerations for 112 Gbps and 224 Gbps Applications

Cathy Liu, Broadcom, USA
Presentation Title: CEI-112G-MR/LR-PAM4 and CEI-224G Outlooks

Mike Li, Intel, USA
Presentation Title: CEI-112G-XSR/VSR-PAM4 Updates and CEI-224G Outlooks

Thananya Baldwin, Keysight Technologies, USA
Presentation Title: Test and Measurement Challenges for the Higher Rates

Biographies:

Thananya Baldwin, Keysight Technologies, USA
Presentation Title: Test and Measurement Challenges for the Higher Rates
Abstract: With higher speeds, there is a convergence of testing for "what the bit looks like” the same time as "what it carries". Striping data across multiple lanes pose a challenge to traditional, per channel, analog test equipment. To better understand potential issues, a best-in-class test solution must have visibility into both “what the bit looks like” as well as “what it carries”.

Thananya Baldwin is an accomplished engineering leader and recognized thought leader for High-Speed Ethernet (HSE) test products and technologies. She is currently vice president of strategic programs with Keysight’s Networking Labs. In this role, she has led ground-breaking programs enabling introduction of the first 25GE, 40GE, 50GE, 100GE and 400GE test systems. While running these leading- edge programs, Thananya actively participates in the IEEE 802.3 Higher Speed Ethernet standard bodies and Optical Internetworking Forum (OIF) projects. Prior to Keysight, she was a technology innovator and evangelist at Ixia, acquired by Keysight in 2018. Thananya holds a Bachelor’s of Science in Engineering and a Master’s of Business Administration. She is an avid world traveler and SCUBA diving enthusiast.
 

Mike Li, Intel, USA
Presentation Title: CEI-112G-XSR/VSR-PAM4 Updates and CEI-224G Outlooks
Abstract: Will review the latest on CEI-112G-VSR-PAM4 and CEI-112G-XSR-PAM4 specifications and provide 224 Gbps investigation results on silicon, channel, and link system for various reaches, from XSR to MR, LR, via simulations and measurements.

Dr. Peng (Mike) Li is an Intel Fellow and the technologist for high-speed I/O and interconnects at Intel Corporation. He serves as Intel’s technical expert and adviser in high-speed I/O and link technology; standards; SerDes architecture; electrical and optical signaling and interconnects; silicon photonics integration; optical field-programmable gate arrays (OFPGAs); and high-speed simulation, debug and test for jitter, noise, signaling and power integrity, from deign validation, to high-volume manufacturing (HVM). Li joined Intel in 2015 with the acquisition of Altera Corp., where he had held a similar role since 2012. Before joining Altera in 2007, Li spent nearly a decade at Wavecrest Corp., culminating in his seven-year tenure as chief technology officer (CTO). He began his career in 1991 as a post-doctorate researcher at the Space Sciences Laboratory at the University of California, Berkeley. Li earned a bachelor’s degree in space physics from the University of Science and Technology of China in Hefei, China; a master’s degree in physics and a master’s degree in electrical and computer engineering, both from the University of Alabama in Huntsville (UAH); and a Ph.D. in physics, also from UAH. Li was named an IEEE Fellow in 2012, an Intel Fellow in 2015, and Engineer of the year (2018, Designcon). He has been elected as an affiliated professor at the Department of Electrical Engineering, University of Washington, Seattle, since 2010.


Cathy Liu, Broadcom, USA
Presentation Title: CEI-112G-MR/LR-PAM4 and CEI-224G Outlooks
Abstract: Will provide status updates on CEI-112G-MR and CEI-112G-LR interfaces and explore modulation options and system performance at next speed node of 224Gb/s over electrical interfaces including die-die/OE, chip-module, chip-chip and copper cables.

Cathy Ye Liu, distinguished Engineer and director, currently heads up Broadcom SerDes architecture and modeling group. Previously she worked as R&D director and distinguished engineer in Avago/LSI which acquired Broadcom in 2016. Since 2002, she has been working on high speed transceiver solutions. Previously she has developed read channel and mobile digital TV receiver solutions. Her technical interests are signal processing, FEC, and modeling in high-speed optical and electrical transceiver solutions. She has published many journal and conference papers and holds 20+ US patents. Cathy has demonstrated her leadership roles in industry standard bodies and forums. Cathy served as a member of the board director of Optical Internetworking Forum (OIF) from 2017-2020. Currently she serves as a member of the board of advisors for the department of Electrical & Computer Engineering (ECE) of University of California at Davis, a member of Signal Integrity Journal editorial advisory board, and the co-chair of the DesignCon technical track of high speed signal processing, equalization and coding.


Gary Nichol, Cisco Systems/OIF, USA
Presentation Title: Considerations for 112 Gbps and 224 Gbps Applications - A System Vendor Perspective
Abstract: This talk will consider the challenges and system needs for next generation 224Gb/s electrical interfaces. The key message will be “Power is Everything”.

Gary is a Principal Engineer working in the Transceiver Module Group (TMG) at Cisco Systems.  He is responsible for defining strategy and technology for high-speed interconnect across Cisco’s routing and switching platforms. Gary also represents Cisco at various industry standards organizations and was an active contributor in the development of 25G, 40G, 100G and 400G standards at the IEEE, OIF and ITU. He was a clause editor for the IEEE 802.3cd project (50 Gb/s, 100 Gb/s, and 200 Gb/s Ethernet) and chief editor for the IEEE 802.3cu project (100 Gb/s and 400 Gb/s over SMF at 100 Gb/s per Wavelength). Gary was also a member of the core team responsible for defining the common management interface specification (CMIS), which is widely used throughout the industry for next generation pluggable optical modules. Gary currently serves as Treasurer/Secretary for OIF. Prior to joining Cisco Gary spent 10 years at Nortel Networks in Ottawa, working in various R&D roles in the development of OC-3, OC-12 and OC48 optical transport products. Gary holds a B.Sc. in Electrical Engineering from the University of Manchester (UK).


Dave Stauffer, Kandou Bus/OIF, Switzerland
Presentation Title: OIF Common Electrical I/O – History and Future
Abstract: Will cover the (standard) historical timeline, 112G taxonomy, and 224G introduction.

Dr. Stauffer has expertise in logic design and architecture for High Speed Serdes and DDR memory interface applications, both in his current position as Director of Chip Architecture at Kandou Bus, and in his previous position as a Senior Technical Staff Member at IBM. He is a contributor to serial link standards (OIF Common Electrical I/O (CEI), INCITS T11 Fibre Channel, Universal Serial Bus 4, JEDEC JESD247), and is the current Chair of the OIF Physical and Link Layer Working Group. Publications include “High Speed Serdes Devices and Applications”, Springer, 2008.


Nathan Tracy, TE Connectivity/OIF, USA
Presentation Title: Channel Considerations for 112 Gbps and 224 Gbps Applications

Abstract: A review of 112G channel scenarios will be discussed and then a look at possible channels for 224 Gbps will be discussed.

Please see biography above.