SC452 - FPGA Programming for Optical Subsystem Prototyping
Monday, 12 March
08:30 - 12:30
Short Course Level: Advanced Beginner
Instructor: Noriaki Kaneda1, Laurent Schmalen2; 1Nokia Bell Labs, USA, 2Nokia Bell Labs, Germany
Short Course Description:
The course is intended for the students and engineers who have background and experience in optical subsystems and optical testing but are beginners in the FPGA programming and FPGA prototyping of optical subsystems. The course is to give insights to participants on FPGA programming by going through materials that give near hands-on experience. Some of the topics covered in the course are as follows,
1) DSP processing blocks adapted for FPGAs
a. Lower rate processing vs. time-stretched processing
b. Implementation in FPGA – best use of resources
c. Single-channel vs. OFDM coherent transceiver
d. Direct vs. coherent detection
2) Offline-processing vs. FPGA implementation vs. ASIC
a. Cost / flexibility / power / time-to-market
3) What can FPGAs currently do (types of resource blocks) ?
a. DSP cores, logic cores
b. ARM processors
d. Next gen. FPGAs
4) Synchronizing multiple FPGAs
5) ADC and DAC options and interfacing/synchronizing with FPGAs.
6) SD-FEC simulation (hot topic). FPGAs vs. GPUs for FEC simulation and error floor analysis.
7) Noise generation for emulation of SD-FEC decoders and optical channels.
Short Course Benefits:
This course should enable you to:
Identify key applications and approaches of FPGA prototyping in optical subsystems.
Describe the key functionalities and capabilities of FPGAs for intended prototyping applications.
Describe the software and hardware architecture required to synchronize the multiple FPGAs and data converters (ADCs and DACs).
Define the difference between concurrent and sequential systems in hardware description languages.
Define the workflow of FPGA projects for implementation ready bit files.
Design the architecture and write basic codes in hardware description languages to realize selective DSP functionalities.
Discuss the use of FPGAs and GPUs as simulation utilities for performing low error-rate Monte-Carlo simulations.
Compare various options for simulating SD-FEC codes and performing error floor analysis using FPGAs and GPUs.
Short Course Audience:
The course is intended for the students and engineers who have background and experience in optical subsystems and optical testing but a beginner in the FPGA programming and FPGA prototyping of optical subsystems. The course is intended to give insights to participants on FPGA programming by going through materials that give near hands-on experience. Most of the materials are related to FPGA prototyping of Digital Signal Processing (DSP) and also Forward Error Correction (FEC) algorithms used in coherent optical transceivers.
Noriaki Kaneda is a distinguished member of technical staff and department head in Emerging Materials, Components and Devices laboratories in Nokia Bell Labs in Murray Hill, NJ USA. He joined Bell labs in 2000 after receiving his Ph.D from University of California, Los Angeles. His research topics include DSP algorithms for single-carrier and OFDM coherent detection and its real-time implementation. He has more than 50 publications in journal and conference papers and has received over 30 international patents in the field.
Laurent Schmalen is a member of technical staff and department head in the IP and Optical Networking laboratories in Nokia Bell Labs in Stuttgart, Germany. He joined Bell Labs in 2011 after receiving his Ph.D. from RWTH Aachen University in Aachen, Germany. His research topics include forward error correction algorithms and digital coded modulation schemes for high-speed optical communications. He has more than 100 publications in journal and conference papers, has co-authored 3 book chapters and holds 3 patents.