The Optical Networking and Communication
Conference & Exhibition

San Diego Convention Center,
San Diego, California, USA

Panel III: Challenges and Solutions for Delivering 400G+ Client and Line Side Optics

Tuesday, 13 March
14:30 - 16:00
Theater I

Andrew Schmitt, Founder, Cignal AI, USA

Panel Description:

Data center switches are scaling from 3.2Tb/s to 6.4, 12.8Tb/s. 25 Tb/s switching chips must be on the horizon. A new generation of 400G front panel pluggable optical transceivers are emerging to support the increased bandwidth. 

Increased electrical speeds of 56 and 64 GBaud and complex signaling and constellations place increased constraints on the packaging and design of optical components. What are the pros and cons of the various pluggable options you’ve evaluated and which direction do you expect to take?
  • How should both client and line side optics be accommodated in the same pluggable format?

  • Is there a reason to keep two large and small form factors for client optics to accommodate longer reach applications? Example, CFP2 and QSFP28 at 100G or OSFP and QSFP DD at 400G?

  • Will coherent dominate the 80-100km transmission market long term or are there applications for direct detect?

  • How important is backward compatibility for QSFP28 DD and do you plan to use it?

  • Which applications require pluggables vs. on-board optics? When do we reach the end of the road for front panel pluggables?

  • What are the challenges with COBO and embedded optics? Can the new 400G generation of pluggables, like QSFP-DD and OSFP scale from 400G to 1.6 Tb/s?

  • Is silicon photonics really meeting the speed-density-cost challenges of hyperscale data centers?

  • How is the optical networking value and supply chain changing?


Andy Bechtolsheim, Chief Development Officer, Arista Networks, USA
Mark Nowell, Distinguished Engineer, Cisco, Canada
Siddharth Sheth, Senior Vice President Networking, Inphi, USA
Mark Filer, Optical Network Architect, Microsoft, USA
Maxim Kuschnerov, Senior R&D Manager, Huawei Technologies, Germany



Andreas "Andy" von Bechtolsheim, Founder, Chief Development Officer, Arista Networks, USA

Andreas von Bechtolsheim is Chairman, Chief Development Officer and a Founder of Arista Networks, a vendor of cloud networking solutions for large data centers.
Previously, Andy was a Co-Founder and Chief System Architect at Sun Microsystems, responsible for next generation server, storage, and network architectures.
As a private venture investor, Andy has been involved in the funding of numerous companies including Google, VMware, Mellanox, Brocade, and Magma Design. He has served on the Board of Directors of over 25 companies, the majority of which went public or were acquired.
Andy earned a M.S. in Computer Engineering from Carnegie Mellon University in 1976. He was a doctoral student in Computer Science at Stanford University from 1977 to 1982. He has been honored with a Fulbright scholarship, a Studienstiftung scholarship, the Stanford Entrepreneur Company of the year award, the Smithsonian Leadership Award for Innovation, and he is a member of the National Academy of Engineering.

Mark Filer, Optical Network Architect, Microsoft, USA

Mark is currently Optical Network Architect at Microsoft, working on next-generation long-haul and metro DCI optical solutions. Prior to that, he spent over 14 years in optical R&D at ADVA Optical Networking in Atlanta, GA. He has published research in the areas of long-haul transmission, ROADM network architectures, and system impairments focused on nonlinear effects and crosstalk. He holds B.Sc. and M.Sc. degrees in electrical engineering from the Georgia Institute of Technology.

Maxim Kuschnerov, Senior R&D Manager, Huawei Technologies, Germany

Dr. Maxim Kuschnerov is a Senior R&D Manager at Huawei focusing on coherent short reach interfaces for data center interconnect (DCI), access and datacom applications incl. 400G ZR and 1.6Tb/s architectures. Before joining Huawei, Maxim worked in product management at Coriant, being responsible for its ultra-long-haul platform, the low cost CFP2-ACO development and the architecture of the Groove G30 DCI platform. Prior to that, he was an engineer at Nokia Siemens Networks developing 100/200Gb/s coherent interconnects and leading high capacity research topics incl. a Guinness world record.

Mark Nowell, Distinguished Engineer, Cisco, Canada

Mark Nowell is a Distinguished Engineer in Cisco’s Data Center Networking team. His focus is on next generation interconnect technology innovation to meet Cisco's needs. Mark is also active within the industry standards and forums and is past chair of the IEEE 802.3by 25 Gb/s Ethernet Task Force and current chair of the 50GbE/100GbE/200GbE Study Groups. He is the Secretary of the Consortium of OnBoard Optics (COBO) and Vice-President of the Ethernet Alliance. Mark also chairs two industry MSA (Multi-source Agreement) groups focusing on next generation optical module form factors (QSFP-DD) and optical interface signaling technology (100G Lambda MSA). Before Cisco, Mark previously worked at Hewlett-Packard Research Labs.

Mark earned his B.Sc. and M.Sc. degrees at Queen’s University in Kingston, Canada, and his Ph.D. at Cambridge University in Cambridge, UK.

Andrew Schmitt, Founder, Cignal AI, USA

Andrew Schmitt is the founder and lead analyst at Cignal AI, where he leads quantitative and qualitative research on the networking market’s entire supply chain. He also provides consulting services to startups, carriers, vendors, and the investment community on developing business opportunities and market strategy.

Siddharth Sheth, SVP, Networking Interconnect, Inphi, USA

Siddharth Sheth brings with him more than 17 years of marketing, engineering and general management experience in the networking and server infrastructure industry. At Inphi, Mr. Sheth heads up the network connectivity business leading the company's efforts in the cloud infrastructure and metro service provider segments. Prior to Inphi, Mr. Sheth was at NetLogic Microsystems (now Broadcom Corp.), where he held worldwide marketing responsibility for NetLogic's networking interconnect chips. While at NetLogic, he pioneered the company's 40G/100G product line and led NetLogic's entry into the mobile and cloud infrastructure markets. In 2001, Mr. Sheth was a founding team member of Aeluros, a mixed-signal networking IC company, where he held global marketing responsibility, helping make Aeluros a market leader until its successful acquisition by NetLogic in 2007. Mr. Sheth also spent many years at Intel Corp, where he held engineering design and management positions in the Pentium III microprocessor and network processor groups. Mr. Sheth is a regularly featured speaker at industry tradeshows and conferences, is a published author at ISSCC and other technical conferences and has an M.S.E.E from Purdue University.




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