Anders Larsson, Chalmers University of Technology, Sweden; Mike Larson, Lumentum, USA; Bert Offrein, IBM, Switzerland
Silicon photonics provides a path to the cost-effective realization of transceiver chips but lacks a straightforward solution to integrate the light source. Today, co-packaging (hybrid integration) is used commercially, while intense research is pursued on III-V to silicon bonding techniques (heterogeneous integration) and even hetero-epitaxial III-V on silicon growth (monolithic integration).
In this workshop some of the main III-V on silicon integration approaches will be reviewed by leading experts in the field and discussed among the participants. In addition to the technological characteristics, the presentations will address system-level aspects such as functionality, power efficiency, form factor and anticipated cost. What are the prospects and challenges and what is ultimately the best method to combine III-V and silicon technology for future applications?
Questions to be addressed during the workshop are:
What is generally the best technique for bringing light to the silicon photonics PIC, from cost/size/efficiency/performance perspectives? Is it application dependent?
For hybrid integration, is there a superior technique for coupling the laser to the silicon photonics PIC? What manufacturing capability (alignment tolerance) is required and what is the typical coupling loss?
For what applications would an on-chip (heterogeneous or monolithic) integrated light source offer superior performance to hybrid integration, at what cost advantage and why?
Is on-chip integration of the light source a prerequisite for higher integration density, more channels, reduced footprint, and higher energy efficiency? Is it the inevitable technology for all applications in the future?
Will further integration of III-V modulator or amplifier material address silicon photonics shortcomings of low electro-optic efficiency and insertion loss? Will silicon ultimately be relegated to passive waveguides only?
Can hetero-epitaxial growth of III-Vs on silicon ever achieve the material quality needed for high performance on-chip lasers and amplifiers?